Abstract & Overview
Image compression is an important technique in storage and transmission of digital images as it requires huge data. In this paper, fast and efficient FPGA based implementation of Discrete Wavelet Transform (DWT) for image compression is proposed. The proposed system is designed using Xilinx System Generator based Simulink model, simulated using MATLAB and synthesized using Xilinx ISE design suite 14.2. The design is implemented on Nexys4 DDR Board with Artix-7 FPGA. The synthesis result shows that this implementation utilizes only 120 slices at maximum operating frequency of 1102.536 MHz.